This disclosure relates to semiconductor devices and methods of making the same. More particularly, the disclosed subject matter relates to a method for making a device comprising forming a dielectric layer adjacent to a gate structure, and the resulting device.
As complementary metal oxide semiconductor (CMOS) devices are scaled to smaller sizes, new materials and concepts are being considered to meet advanced performance targets. CMOS technology includes N-type metal oxide semiconductor (NMOS) and P-type metal oxide semiconductor (PMOS). For example, a metal-oxide-semiconductor field-effect transistor (MOSFET) is a transistor used for amplifying or switching electronic signals. One performance criterion for NMOS and PMOS MOSFETS, and various other devices, is device switching frequency. Contacts are made to the gate electrodes, and to both the source and drain regions, of the transistors.
A thin dielectric layer such as an oxide side wall is sometimes disposed between a gate electrode and an interlayer dielectric (ILD) layer. However, the dielectric constant (k) value of the oxide side wall is generally fixed and cannot be changed once it is formed.